U60) as shown in, Figure 2–18, Figure 2–19 – Altera Nios Development Board Stratix II Edition User Manual

Page 50

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2–40

Reference Manual

Altera Corporation

Nios Development Board Stratix II Edition

May 2007

Board Components

Figure 2–18. JTAG Connector (J24) to Stratix II Device

Figure 2–19. USB Blaster Connected to J24 JTAG Connector

The FPGA’s JTAG pins can also be accessed via the Mictor connector (J25).
The pins of J24 are connected directly to pins on J25, and care must be
taken so that signal contention does not occur between the two
connectors.

TMS

TDI

TCK

TDO

TRST

To Mictor Connector (J25)

JTAG Signals

JTAG Connector

(J24)

FPGA
(U62)

Pin 1

J24

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