Figure 14.6 burst read cycles - nvlbus=1, Datasheet – SMSC LAN91C111 User Manual
Page 114
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10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Revision 1.91 (08-18-08)
114
SMSC LAN91C111 REV C
DATASHEET
Figure 14.6 Burst Read Cycles - nVLBUS=1
PARAMETER
MIN
TYP
MAX
UNITS
t12
nDATACS Setup to LCLK Rising
20
ns
t12A
nDATACS Hold after LCLK Rising
0
ns
t14
nRDYRTN Setup to LCLK Falling
10
ns
t15
nRDYRTN Hold after LCLK Falling
10
ns
t17
W/nR Setup to LCLK Falling
15
ns
t17A
W/nR Hold After LCLK Falling
3
ns
t19
Data Delay from LCLK Rising (Read)
5
15
ns
t15
t19
t19
t17A
t12A
t14
t12
t17
a
b
c
Clock
nDATACS
W/nR
nCYCLE
Read Data
nRDYRTN
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