SMSC LAN91C111 - Manual (Page 44)

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Revision 1.91 (08-18-08) 44 SMSC LAN91C111 REV C
DATASHEET
The receive byte count always appears as even; the ODDFRM bit of the receive status word indicates
if the low byte of the last word is relevant.
The transmit byte count least significant bit will be assumed 0 by the controller regardless of the value
written in memory.
DATA AREA - The data area starts at offset 4 of the packet structure and can extend up to 2043 bytes.
The data area contains six bytes of DESTINATION ADDRESS followed by six bytes of SOURCE
ADDRESS, followed by a variable-length number of bytes. On transmit, all bytes are provided by the
CPU, including the source address. The LAN91C111 does not insert its own source address. On
receive, all bytes are provided by the CSMA side.
The 802.3 Frame Length word (Frame Type in Ethernet) is not interpreted by the LAN91C111. It is
treated transparently as data both for transmit and receive operations.
CONTROL BYTE - For transmit packets the CONTROL BYTE is written by the CPU as:
ODD - If set, indicates an odd number of bytes, with the last byte being right before the CONTROL
BYTE. If clear, the number of data bytes is even and the byte before the CONTROL BYTE is not
transmitted.
CRC - When set, CRC will be appended to the frame. This bit has meaning only if the NOCRC bit in
the TCR is set.
For receive packets the CONTROL BYTE is written by the controller as:
ODD - If set, indicates an odd number of bytes, with the last byte being right before the CONTROL
BYTE. If clear, the number of data bytes is even and the byte before the CONTROL BYTE should be
ignored.
8.2 Receive Frame Status
This word is written at the beginning of each receive frame in memory. It is not available as a register.
ALGNERR - Frame had alignment error.
X X ODD CRC 0 0 0 0
0 1 ODD 0 0 0 0 0
HIGH
BYTE
ALGN
ERR
BROD
CAST
BAD
CRC
ODD
FRM TOOLNG TOO
SHORT
LOW
BYTE
HASH VALUE MULT
CAST
Reserved 5 4 3 2 1 0