SMSC LAN91C111 - Manual (Page 13)

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
SMSC LAN91C111 REV C 13 Revision 1.91 (08-18-08)
DATASHEET
Figure 3.3 LAN91C111 Physical Layer to Internal MAC Block Diagram
COLLISION
4B5B
DECODER
DESCRAMBL
ER
CLOCK &
DATA
RECOVERY
AUTO
NEGOTIATION
& LINK
SQUELCH
CLOCK &
DATA
Recovery
(Manchester
Decoder)
LP
FILTER
ROM
DAC +
-
10BASE-T
TRANSMITTER
CLOCK
GEN
(PLL)
MANCHESTER
4B5B
ENCODER
SCRAMBLER
TPO+ SWITCHED
CURRENT
SOURCE
+
-
100BASE-TX
TRANSMITTER
CLOCK
GEN
(PLL)
TPO-
LP
FILTER
TPI+
TPI-
LP
FILTER
+
-
+/- Vth
+
10BASE-T
RECEIVER
MLT3
ENCODER
ADAPTIVE
EQUALIZER
+
+/- Vth
+
100BASE-TX
RECEIVER
MLT
ENCODER
SQUELCH
RBIAS
CSMA
/C
D
S 1
S 8
D
C 1 EN B C 3 C 2
Multiplexer
S 1
S 8
D
C 1 EN B C 3 C 2
LS[2-0]B
LEDA
LED
nPLED[0-5]
LS[2-0]A
LED
Control
Power
On
Reset
PHY
CONTROLS
TXD[3:0]
TX_ER
TXEN100
TX25
CRS100
COL100
RXD[3:0]
RX_ER
RX_DV
RX25
MCLK
MDO
EE
CS
EE
SK
EE
DO
To M
II
Ex
te
rnal S
ignals
MII
AUTONEG
LOGIC
EEPROM
CONTROL
MDI
MII
SERIAL
Manage
-ment
MII External
Signals
EE
DI
Multiplexer
-