5 microwire interface registers, Microwire interface registers, Cp3 bt26 – National CP3BT26 User Manual

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CP3

BT26

23.5

MICROWIRE INTERFACE REGISTERS

Software interacts with the Microwire interface by accessing
the Microwire registers. There are three such registers:

23.5.1

Microwire Data Register (MWDAT)

The MWDAT register is a word-wide, read/write register
used to transmit and receive data through the MDODI and
MDIDO pins. The register format is shown below.

Figure 90 shows the hardware structure of the register.

Figure 90.

MWDAT Register

23.5.2

MICROWIRE Control Register (MWCTL1)

The MWCTL1 register is a word-wide, read/write register
used to control the Microwire module. To avoid clock glitch-
es, the MWEN bit must be clear while changing the states
of any other bits in the register. At reset, all non-reserved
bits are cleared. The register format is shown below.

MWEN

The Microwire Enable bit controls whether the
Microwire interface module is enabled.
0 – Microwire module disabled.
1 – Microwire module enabled.
Clearing this bit disables the module, clears
the status bits in the Microwire status register
(the BSY, RBF, and OVR bits in MWSTAT),
and places the Microwire interface pins in the
states described below.

MNS

The Master/Slave Select bit controls whether
the CP3BT26 is a master or slave. When
clear, the device operates as a slave. When
set, the device operates as the master.
0 – CP3BT26 is slave.
1 – CP3BT26 is master.

MOD

The Mode Select bit controls whether 8- or 16-
bit mode is used. When clear, the device op-
erates in 8-bit mode. When set, the device op-
erates in 16-bit mode. This bit must only be
changed when the module is disabled or idle
(MWSTAT.BSY = 0).
0 – 8-bit mode.
1 – 16-bit mode.

ECHO

The Echo Back bit controls whether the echo
back function is enabled in slave mode. This
bit must be written only when the Microwire in-
terface is idle (MWSTAT.BSY=0). The ECHO
bit is ignored in master mode. The MWDAT
register is valid from the time the register has
been written until the end of the transfer. In the
echo back mode, MDODI is transmitted (ech-
oed back) on MDIDO if the MWDAT register
does not contain any valid data. With the echo
back function disabled, the data held in the

Table 74

Microwire Interface Registers

Name

Address

Description

MWDAT

FF F3A0h

Microwire Data

Register

MWCTL1

FF F3A2h

Microwire Control

Register

MWSTAT

FF F3A4h

Microwire Status

Register

7

0

MWDAT

Shifter

(High Byte)

DIN

Write

DOUT

MOD

MWDAT

1

0

Shifter

(Low Byte)

Read Buffer

(High Byte)

Read Buffer

(Low Byte)

Read

DS074

7

6

5

4

3

2

1

0

SCM

EIW

EIR

EIO

ECHO MOD

MNS

MWEN

15

9

8

SCDV

SCIDL

Pin

State When Disabled

MSK

Master – SCIDL Bit
Slave – Input

MWCS

Input

MDIDO

Master – Input
Slave – TRI-STATE

MDODI

Master – Known value
Slave – Input

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