ADLINK ACL-8112 Series - Manual (Page 10)

2
• Introduction
CH 0 CH 1 CH 2
. . .
ANALOG INPUT
>
16 BIT
DIGITAL INPUT
REGISTER
D/I 0
DI 1 DO 15 D/O 0 DO 1 DI 15
DMA SELECT
#1 OR #3
TRIG
LOGIC
PACER
TRIG
SOFTWARE
TRIG
EXTERNAL
TRIG
CH 15
D/A 1 OUT
GND
REF 1 IN D/A 0 OUT
GND
REF 0 IN
4 MHz OSC.
FR/2
2MHz
OUT 0
16 BIT
COUNTER #0
16 BIT
COUNTER #1
16 BIT
COUNTER #2
TO PACER TRIG
16 BIT
DIGITAL INPUT
REGISTER
12-Bit
Code Latch
16 channel
Single-ended
or
8 Differential
Analog
Multiplexer
AMP
DC/DC
CONVERTER
+15
-15
+5V
MUX SCAN CONTROL
12-Bit
Code Latch
D/A #1 12 BIT
MULITIPLYING D/A
DATA
BUFFER
INTERRUPT IRQ SELECT
CONTROL
LOGIC
DACK
I/O PORT DECODER
INTERNAL BUS
GAIN
SELECT
D/A #0 12 BIT
MULITIPLYING D/A
12 Bit
A/D Converter
(B.B 774)
INPUT
BUFFER
> >
< <
EXT.CLK
<
PC/AT BUS
EOC
DRQ
. . . . . .
Figure 1.1 ACL - 8112 BLOCK DIAGRAM