ADLINK ACL-8112 Series - Manual (Page 26)

18
• Installation
2.9 Clock Source Setting
The 8254 programmable interval timer is used in the ACL-8112. It provides
3 independent 16-bit programmable down counters. The input of counter 2
is connected to a precision 2MHz oscillator which is the internal pacer. The
input of counter 1 is cascaded from the output of counter 2. Channel 0 is
free for user's applications. There are two selections for the clock source of
channel 0: the internal 2MHz clock or an external clock signal from
connector CN3 pin 37. The setting for the clock is shown in Figure 2.6.
2.10 IRQ Level Setting
The ACL-8112 can connect to any one of the interrupt lines of the PC I/O
channel. The interrupt line is selected by JP5 of ACL-8112DG/HG or JP3 of
ACL-8112PG. If you wish to use the interrupt capability of ACL-8112, you
must select an interrupt level and place the jumper in the appropriate position
to enable the particular interrupt line.
The default interrupt level is IRQ15, which is selected by placing the jumper
on the pins in row number 15. Figure 2.7 shows the default interrupt jumper
setting IRQ15. You only remove the jumper from IRQ15 to other new pins, if
you want to change to another IRQ level.
Note: Please note that no other add-on cards can shares the same
interrupt level at the same time.
No Interrupt :
Interrupt level :
IRQ15
(default setting)
JP5 / JP3
5 6 7 9 10 11 12 15 X IRQ 3
JP5 / JP3
5 6 7 9 10 11 12 15 X IRQ 3
Figure 2.7 IRQ Level Setting