ADLINK ACL-8112 Series - Manual (Page 25)

Installation
• 17
2.8 Internal/External Trigger Setting
The A/D conversion trigger source of the ACL-8112 can come from an
internal or external source. The internal or external trigger source is set by
JP4 on the ACL-8112DG/HG and by JP5 on the ACL-8112PG, as shown
on Figure 2.5. Note that there are two internal trigger sources, one is by
software trigger and the other is by the programmable pacer trigger, which
is controlled by the mode control register(see section 4.5).
Figure 2.5 Trigger Source Setting
Figure 2.6 Timer's Clock Source Setting
Internal Trigger
(default setting)
External Trigger
JP4 / JP5
INTTRG
EXTTRG
JP4 / JP5
INTTRG
EXTTRG
Internal Clock
Source : 2MHz
(default setting)
External Clock
Source
JP6 / JP4
INTCLK
EXTCLK
JP6 / JP4
INTCLK
EXTCLK