ADLINK PCIe-7300A - Manual (Page 52)

42 Operation Theory
tion of DI-ACK. If the external device follows the rule,
there would be no data lost due to FIFO overrun.
3. Handshaking: For the digital input, through DI-REQ
input signal from external device and DI-ACK output sig-
nal to the external deviec, the digital input can have sim-
ple handshaking data transfer. For the digital output,
through DO-REQ output signal to the dexternal device
and DO-ACK input signal from external device, the digi-
tal output can have simple handshaking data transfer
4. Burst Handshaking: This mode is available for both
digital output and digital input. If the digital output DMA
use internal clock and the burst handshaking mode is
enable, the cPCI/PCI/PCIe-7300A output data only when
DO-ACK is asserted. That is, the external device can
control the data input from the cPCI/PCI/PCIe-7300A by
asserting the DO-ACK pin when it is ready to receive
data.
The software driver functions of 5.6 and 5.7 are provided to setup
the clocking mode of digital input and digital output, respectively.
Note: Due to the internal clock is based on 10MHz clock, some
specific sampling rate or pacer rate cannot be generated by
software, such as 9MHz. For digital input, users can use the
external clock source. However, for digital output, users
should replace the default 40MHz oscillator because the cur-
rent version of cPCI/PCI/PCIe-7300A does not support ex-
ternal clock for digital output.
The frequency of external input clock cannot exceed 40MHz
due to the local bus timing requirement.
When users replace the default oscillator on board, the cor-
responding frequency would be changed, for example, by re-
placement with 36Mhz oscillator, the internal clock selection
would be changed to 18MHz, 9MHz, and 9MHz base timer
output.