ADLINK PCIe-7300A User Manual
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Operation
Theory
and remove the unnecessary processes in your applica-
tion programs.
3. When high-speed sampling frequency is applied, the
larger block size will improve the efficiency of DMA
transferring, and probability of overrun in the DMA pro-
cess will be reduced.
4. To apply the high-speed continuous digital input, it is rec-
ommended to execute your application programs in the
non-multitask operation system to reduce the latency
time between two DMA transfers.
Note:
The latency time between two DMA transfers is different
from the PCI bus latency time mentioned in the previous sec-
tion of “Bus Mastering”. The former means the time differ-
ence between two continuous DMA processes started by the
software. And the latter means the time difference between
two continuously hardware DMA requests on the PCI bus
within a DMA process.