Altera Avalon Verification IP Suite - Manual (Page 183)

pop_result()
void pop_result() Prototype:
Verilog HDL: None
VHDL: bfm_id , req_if(bfm_id)
Arguments:
void
. Returns:
Removes the result instruction from the queue before querying the contents. Description:
Verilog HDL, VHDL Language support:
push_instruction()
void push_instruction() Prototype:
Verilog HDL: None
VHDL: bfm_id , req_if(bfm_id)
Arguments:
void
Returns:
Inserts a new instruction into the queue. Description:
Verilog HDL, VHDL Language support:
retrieve_result()
void retrive_result
() Prototype:
VHDL:
output ci_data_t value.
Verilog HDL:
output ci_data_t value.
Arguments:
output
bfmci_data_t_id
delay. output
bfmci_data_t_id
delay.
bfm_id
req_if(bfm_id)
void
Returns:
A simplified API to remove and retrieve results. Description:
Verilog HDL, VHDL Language support:
Nios II Custom Instruction Master BFM Altera Corporation
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pop_result() 14-8