Altera Avalon Verification IP Suite - Manual (Page 47)

signal_fatal_error
signal_fatal_error
Prototype:
Verilog HDL: None
VHDL: N.A.
Arguments:
void
Returns:
Notifies the testbench that a fatal error has occured in this module. Description:
Verilog HDL Language support:
signal_max_command_queue_size
signal_max_command_queue_size
Prototype:
Verilog HDL: None
VHDL: N.A.
Arguments:
void Returns:
Signals that the maximum pending transaction queue size threshold has been
exceeded. Description:
Verilog HDL Language support:
signal_min_command_queue_size
signal_min_command_queue_size
Prototype:
Verilog HDL: None
VHDL: N.A.
Arguments:
void Returns:
Signals that the pending transaction queue size is below the minimum threshold. Description:
Verilog HDL Language support:
Altera Corporation Avalon-MM Master BFM
Send Feedback
5-25 signal_fatal_error