Epson S1C63000 - Manual (Page 103)

S1C63000 CORE CPU MANUAL EPSON 97
CHAPTER 4: INSTRUCTION SET
JR sign8 Jump to relative location sign8 1 cycle
Function: PC
←
PC + sign8 + 1 (sign8 = -128~127)
Adds the relative address specified with the sign8 to the address next to this instruction, to
unconditionally branch to that address. Branch destination range is the next address of this
instruction -128 to +127.
Code: Mnemonic MSB LSB
JR sign8 0 0 0 0 0 s7 s6 s5 s4 s3 s2 s1 s0 0000H–00FFH
Flags: E I C Z
↓
– – –
Mode: Signed 8-bit PC relative
Extended addressing: Valid
Extended LDB %EXT,imm8
operation: JR sign8 PC
←
PC + sign16 + 1
(sign16 = -32768 to 32767, upper 8-bit: imm8, lower 8-bit: sign8)
JRC sign8 Jump to relative location sign8 if C flag is set 1 cycle
Function: If C = 1 then PC
←
PC + sign8 + 1 (sign8 = -128~127)
Executes the "JR sign8" instruction if the C (carry) flag has been set to "1", otherwise executes
the next instruction.
Code: Mnemonic MSB LSB
JRC sign8 0 0 1 0 0 s7 s6 s5 s4 s3 s2 s1 s0 0400H–04FFH
Flags: E I C Z
↓
– – –
Mode: Signed 8-bit PC relative
Extended addressing: Valid
Extended LDB %EXT,imm8
operation: JRC sign8 If C = 1 then PC
←
PC + sign16 + 1
(sign16 = -32768 to 32767, upper 8-bit: imm8, lower 8-bit: sign8)