Dec %sp ex %a,%b – Epson S1C63000 User Manual
Page 96
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90
EPSON
S1C63000 CORE CPU MANUAL
CHAPTER 4: INSTRUCTION SET
DEC %sp
EX %A,%B
Exchange A reg. and B reg.
1 cycle
Function:
A
↔
B
Exchanges the contents of the A register and B register.
Code:
Mnemonic
MSB
LSB
EX %A,%B
1
1
1
1
1
1
1
1
1
0
1
1
1
1FF7H
Flags:
E
I
C
Z
↓
–
–
–
Mode:
Src: Register direct
Dst: Register direct
Extended addressing: Invalid
Decrement stack pointer
1 cycle
Function:
sp
←
sp - 1
Decrements (-1) the content of the stack pointer sp (SP1 or SP2). This instruction does not
change the C flag regardless of the operation result.
Code:
Mnemonic
MSB
LSB
DEC %SP1
1
1
1
1
1
1
1
1
0
0
0
0
0
1FE0H
DEC %SP2
1
1
1
1
1
1
1
1
0
0
1
0
0
1FE4H
Flags:
E
I
C
Z
↓
–
–
↕
Mode:
Register direct
Extended addressing: Invalid
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