Add %ir,sign8, And %r,%r – Epson S1C63000 User Manual
Page 79
S1C63000 CORE CPU MANUAL
EPSON
73
CHAPTER 4: INSTRUCTION SET
ADD %ir,sign8
Add immediate data sign8 to ir reg.
1 cycle
Function:
ir
←
ir + sign8
Adds the signed 8-bit immediate data sign8 (-128 to 127) to the ir register (X or Y). This instruc-
tion does not affect the C flag regardless of the operation result.
Code:
Mnemonic
MSB
LSB
ADD %X,sign8
0
1
1
0
0 s7 s6 s5 s4 s3 s2 s1 s0 0C00H–0CFFH
ADD %Y,sign8
0
1
1
0
1 s7 s6 s5 s4 s3 s2 s1 s0 0D00H–0DFFH
Flags:
E
I
C
Z
↓
–
–
↕
Mode:
Src: Immediate data
Dst: Register direct
Extended addressing: Valid
Extended
LDB
%EXT,imm8
operation:
ADD
%ir,sign8
ir
←
ir + sign16 (upper 8-bit: imm8, lower 8-bit: sign8)
AND %r,%r'
Logical AND of r' reg. and r reg.
1 cycle
Function:
r
←
r
∧
r'
Performs a logical AND operation of the content of the r' register (A or B) and the content of
the r register (A or B), and stores the result in the r register.
Code:
Mnemonic
MSB
LSB
AND %A,%A
1
1
0
1
0
0
1
1
1
0
0
0
X
1A70H, (1A71H)
AND %A,%B
1
1
0
1
0
0
1
1
1
0
0
1
X
1A72H, (1A73H)
AND %B,%A
1
1
0
1
0
0
1
1
1
0
1
0
X
1A74H, (1A75H)
AND %B,%B
1
1
0
1
0
0
1
1
1
0
1
1
X
1A76H, (1A77H)
Flags:
E
I
C
Z
↓
–
–
↕
Mode:
Src: Register direct
Dst: Register direct
Extended addressing: Invalid