Or %f,imm4, Or %r,[%ir – Epson S1C63000 User Manual
Page 119
S1C63000 CORE CPU MANUAL
EPSON
113
CHAPTER 4: INSTRUCTION SET
OR %F,imm4
Logical OR of immediate data imm4 and F reg.
1 cycle
Function:
F
←
F
∨
imm4
Performs a logical OR operation of the 4-bit immediate data imm4 and the content of the F
(flag) register, and stores the result in the r register. It is possible to set any flag.
Code:
Mnemonic
MSB
LSB
OR %F,imm4
1
0
0
0
0
1
0
0
1 i3 i2 i1 i0
1090H–109FH
Flags:
E
I
C
Z
↑
↑
↑
↑
Mode:
Src: Immediate data
Dst: Register direct
Extended addressing: Invalid
OR %r,[%ir]
Logical OR of location [ir reg.] and r reg.
1 cycle
Function:
r
←
r
∨
[ir]
Performs a logical OR operation of the content of the data memory addressed by the ir register
(X or Y) and the content of the r register (A or B), and stores the result in the r register.
Code:
Mnemonic
MSB
LSB
OR %A,[%X]
1
1
0
1
1
0
1
1
0
0
0
0
0
1B60H
OR %A,[%Y]
1
1
0
1
1
0
1
1
0
0
0
1
0
1B62H
OR %B,[%X]
1
1
0
1
1
0
1
1
0
0
1
0
0
1B64H
OR %B,[%Y]
1
1
0
1
1
0
1
1
0
0
1
1
0
1B66H
Flags:
E
I
C
Z
↓
–
–
↕
Mode:
Src: Register indirect
Dst: Register direct
Extended addressing: Valid
Extended
LDB
%EXT,imm8
operation:
OR
%r,[%X]
r
←
r
∨
[00imm8] (00imm8 = 0000H + 00H to FFH)
LDB
%EXT,imm8
OR
%r,[%Y]
r
←
r
∨
[FFimm8] (FFimm8 = FF00H + 00H to FFH)