Epson S1C63000 User Manual
Page 16
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EPSON
S1C63000 CORE CPU MANUAL
CHAPTER 2: ARCHITECTURE
• 16-bit data transfer/arithmetic for the index registers X and Y
The following six instructions, which handle the X or Y register and have an 8-bit immediate data as
the operand, permit the extended addressing.
LDB
%XL,imm8
LDB
%YL,imm8
ADD
%X,sign8
ADD
%Y,sign8
CMP
%X,imm8
CMP
%Y,imm8
When data is written to the EXT register and the E flag is set immediately before these instructions,
the data is processed after extending into 16-bit; imm8 (sign8) is used as the low-order 8 bits and the
content of the EXT register is used as the high-order 8 bits.
Examples:
LDB
%EXT,0x15
LDB
%XL,0x7D
...Works as "LD %X,0x157D"
LDB
%EXT,0xB8
ADD
%X,0x4F
...Works as "ADD %X, 0xB84F"
LDB
%EXT,0xE6
CMP
%X,0xA2
...Works as "CMP %X, 0x19A2"
∗
19H = FFH - [EXT] (E6H)
Above examples use the X register, but work the same even when the Y register is used.
Note: The CMP instruction performs a subtraction with a complement, therefore it is necessary to set the
complement (1's complement) of the high-order 8-bit data in the EXT register.
EXT register
←
[FFH - High-order 8-bit data]
• Extending branch addresses
The following PC relative branch instructions, which have a signed 8-bit relative address as the
operand, permit extended addressing.
JR
sign8
JRC
sign8
JRNC sign8
JRZ
sign8
JRNZ sign8
CALR sign8
When data is written to the EXT register and the E flag is set immediately before these instructions,
the relative address is processed after extending into signed 16-bit; sign8 is used as the low-order 8
bits and the content of the EXT register is as the high-order 8 bits.
Examples:
LDB
%EXT,0x64
JR
0x29
...Works as "JR 0x6429"
LDB
%EXT,0x00
JR
127
...Works as "JR 127"
LDB
%EXT,0xFF
JR
-128
...Works as "JR -128"
LDB
%EXT,0x3A
JR
∗
0x88
...Works as "JR
∗
0x3A88" (
∗
= C, NC, Z, or NZ)
LDB
%EXT,0xF8
CALR 0x62
...Works as "CALR 0xF862"
See Section 2.2.3, "Branch instructions" for the branch instructions.