Ld %r,imm4, Ld %r,[%ir – Epson S1C63000 User Manual
Page 106
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EPSON
S1C63000 CORE CPU MANUAL
CHAPTER 4: INSTRUCTION SET
LD %r,imm4
Load immediate data imm4 into r reg.
1 cycle
Function:
r
←
imm4
Loads the 4-bit immediate data imm4 into the r register (A, B or F).
Code:
Mnemonic
MSB
LSB
LD %A,imm4
1
1
1
1
0
1
1
0
0 i3 i2 i1 i0
1EC0H–1ECFH
LD %B,imm4
1
1
1
1
0
1
1
0
1 i3 i2 i1 i0
1ED0H–1EDFH
LD %F,imm4
1
0
0
0
0
1
0
1
1 i3 i2 i1 i0
10B0H–10BFH
Flags:
E
I
C
Z
↓
–
–
–
↕
↕
↕
↕
(r = F)
Mode:
Src: Immediate data
Dst: Register direct
Extended addressing: Invalid
LD %r,[%ir]
Load location [ir reg.] into r reg.
1 cycle
Function:
r
←
[ir]
Loads the content of the data memory addressed by the ir register (X or Y) into the r register (A
or B).
Code:
Mnemonic
MSB
LSB
LD %A,[%X]
1
1
1
1
0
1
1
1
0
0
0
0
0
1EE0H
LD %A,[%Y]
1
1
1
1
0
1
1
1
0
0
0
1
0
1EE2H
LD %B,[%X]
1
1
1
1
0
1
1
1
0
0
1
0
0
1EE4H
LD %B,[%Y]
1
1
1
1
0
1
1
1
0
0
1
1
0
1EE6H
Flags:
E
I
C
Z
↓
–
–
–
Mode:
Src: Register indirect
Dst: Register direct
Extended addressing: Valid
Extended
LDB
%EXT,imm8
operation:
LD
%r,[%X]
r
←
[00imm8] (00imm8 = 0000H + 00H to FFH)
LDB
%EXT,imm8
LD
%r,[%Y]
r
←
[FFimm8] (FFimm8 = FF00H + 00H to FFH)