Adc [%ir],%r, Adc [%ir]+,%r – Epson S1C63000 User Manual
Page 69
S1C63000 CORE CPU MANUAL
EPSON
63
CHAPTER 4: INSTRUCTION SET
ADC [%ir],%r
Add with carry r reg. to location [ir reg.]
2 cycles
Function:
[ir]
←
[ir] + r + C
Adds the content of the r register (A or B) and carry (C) to the data memory addressed by the ir
register (X or Y).
Code:
Mnemonic
MSB
LSB
ADC [%X],%A
1
1
0
0
1
1
1
1
0
1
0
0
0
19E8H
ADC [%X],%B
1
1
0
0
1
1
1
1
0
1
1
0
0
19ECH
ADC [%Y],%A
1
1
0
0
1
1
1
1
0
1
0
1
0
19EAH
ADC [%Y],%B
1
1
0
0
1
1
1
1
0
1
1
1
0
19EEH
Flags:
E
I
C
Z
↓
–
↕
↕
Mode:
Src: Register direct
Dst: Register indirect
Extended addressing: Valid
Extended
LDB
%EXT,imm8
operation:
ADC
[%X],%r
[00imm8]
←
[00imm8] + r + C (00imm8 = 0000H + 00H to FFH)
LDB
%EXT,imm8
ADC
[%Y],%r
[FFimm8]
←
[FFimm8] + r + C (FFimm8 = FF00H + 00H to FFH)
ADC [%ir]+,%r
Add with carry r reg. to location [ir reg.] and increment ir reg.
2 cycles
Function:
[ir]
←
[ir] + r + C, ir
←
ir + 1
Adds the content of the r register (A or B) and carry (C) to the data memory addressed by the ir
register (X or Y). Then increments the ir register (X or Y). The flags change due to the operation
result of the data memory and the increment result of the ir register does not affect the flags.
Code:
Mnemonic
MSB
LSB
ADC [%X]+,%A
1
1
0
0
1
1
1
1
0
1
0
0
1
19E9H
ADC [%X]+,%B
1
1
0
0
1
1
1
1
0
1
1
0
1
19EDH
ADC [%Y]+,%A
1
1
0
0
1
1
1
1
0
1
0
1
1
19EBH
ADC [%Y]+,%B
1
1
0
0
1
1
1
1
0
1
1
1
1
19EFH
Flags:
E
I
C
Z
↓
–
↕
↕
Mode:
Src: Register direct
Dst: Register indirect
Extended addressing: Invalid