Motorola SSETM 5000 - Manual (Page 33)

6881094C12-A November 11, 2004
Theory of Operation: Transceiver Board 2-11
Figure 2-5. Abacus III (AD9874) Functional Block Diagram
Input signal RXIF is 73.35 MHz IF from crystal filter FL400 in the receiver front-end. Components
L547 and C542 match the input impedance to 50 ohms. Formatted SSI data is output to the VOCON
board on ports FS, DOUTA, and CLKOUT.
2.4.2.2.2 Second Local Oscillator
The second LO is controlled by the Abacus LO synthesizer, which mixes with IFIN to produce a 2.25
MHz final IF. The external VCO consists of Q502 and its bias network and frequency-determining
elements. Signal FREF is the 16.8 MHz reference from the FGU. Darlington transistor Q501 with
C550 and R501 form an active power-line filter.
The second LO frequency is 71.1 MHz by default or 75.6 MHz in special cases as needed to avoid
radio self-quieters. The loop filter is composed of R551, C558, C559, R552, and C512.
2.4.2.2.3 Sampling Clock Oscillator
The Abacus sampling clock synthesizer operates at 18 MHz = 8 x 2.25 MHz. The VCO uses an
internal transistor and external resonator. The resonator is composed of L503, C535, C929, and
D501.
The loop filter is composed of R512, C536, R514, C570, and C571.
2.4.3 Transmitter
NOTE: Refer to Figure 2-6 for the transmitter block diagram and Figure 12-4 for the transmitter
schematic.
The transmitter takes modulated RF from the FGU and amplifies it to the radio’s rated output power
to produce the modulated transmitter carrier at the antenna.
The transmitter consists of an RF driver IC that receives its input signal from the voltage-controlled
oscillator (VCO) and a high-power output transistor. Transmitter power is controlled by a power-
DAC AGC
LNA IFIN
FREF
LO
Synth.
Samp. Clock
Synthesizer
Voltage/
Current
Reference
Control Logic
SPI
Decimation
Filter
M ADC
AD9874
-16dB
......=13-26MHz
DOUTA
DOUTB
FS
CLKOUT
LO VCO and
Loop Filter
CLK VCO and
Loop Filter
IOUTL LOP LON
IOUTC CLKP CLKN
VREFP
RREF
VREFN
PC PD PE
SYNCB
MXOP MXON IF2P IF2N GCP GCN
Formatting/SSI
MAEPF-27412-O