Samsung S3C2440A - Manual (Page 282)

I/O PORTS S3C2440A RISC MICROPROCESSOR
9-36
DSCn (Drive Strength Control)
Control the Memory I/O drive strength
Register Address R/W Description Reset Value
DSC0 0x560000c4 R/W strength control register 0 0x0
DSC1 0x560000c8 R/W strength control register 1 0x0
DSC0 Bit Description Reset Value
nEN_DSC [31] enable Drive Strength Control
0: enable
1: Disable
0
Reserved [30:10] - 0
DSC_ADR [9:8] Address Bus Drive strength.
00: 12mA
10: 10mA 01: 8mA 11: 6mA
00
DSC_DATA3 [7:6] DATA[31:24] I/O Drive strength.
00: 12mA
10: 10mA 01: 8mA 11: 6mA
00
DSC_DATA2 [5:4] DATA[23:16] I/O Drive strength.
00: 12mA
10: 10mA 01: 8mA 11: 6mA
00
DSC_DATA1 [3:2] DATA[15:8] I/O Drive strength.
00: 12mA
10: 10mA 01: 8mA 11: 6mA
00
DSC_DATA0 [1:0] DATA[7:0] I/O Drive strength.
00: 12mA
10: 10mA 01: 8mA 11: 6mA
00