Samsung S3C2440A - Manual (Page 530)

ELECTRICAL DATA S3C2440A RISC MICROPROCESSOR
27-12
XTIpll
VCO
Output
Clock
Disable
FCLK
Several slow clocks (XTIpll or EXTCLK)
Power_OFF mode is initiated.
t OSC2
EXTCLK
Figure 27-8 Sleep Mode Return Oscillation Setting Timing Diagram