Samsung S3C2440A - Manual (Page 554)

ELECTRICAL DATA S3C2440A RISC MICROPROCESSOR
27-36
Table 27-7 Clock Timing Constants
(V
DDi,
V
DDalive,
V
DDiarm
= 1.2 V
±
0.1 V, T
A
= -40 to 85
°
C, V
DDMOP
= 3.3V
±
0.3V)
Parameter Symbol Min Typ Max Unit
Crystal clock input frequency f
XTAL
12 – 20 MHz
Crystal clock input cycle time t
XTALCYC
50 – 83.3 ns
External clock input frequency f
EXT
– – 66 MHz
External clock input cycle time t
EXTCYC
15.0 – – ns
External clock input low level pulse width t
EXTLOW
7 – – ns
External clock to HCLK (without PLL) t
EX2HC
3 – 7 ns
HCLK (internal) to CLKOUT t
HC2CK
3 – 9 ns
HCLK (internal) to SCLK t
HC2SCLK
1 – 2 ns
External clock input high level pulse width t
EXTHIGH
4 – – ns
Reset assert time after clock stabilization t
RESW
4 – –
XTIpll or
EXTCLK
PLL Lock Time t
PLL
300 – µS
Sleep mode return oscillation setting time t
OSC2
– – 65536
XTIpll or
EXTCLK
Interval before CPU runs after nRESET is released t
RST2RUN
– 7 –
XTIpll or
EXTCLK