Proface PS4800 - 19 Panel PC" - Manual (Page 86)

Configuration of the BIOS
86
Advanced PCI Express GEN 2 Settings
The table shows the Advanced PCI Express GEN 2 Settings options:
Link Training
Timeout (µs) Option to define how many microsec-
onds the software waits before the link
training bit in the link status register is
queried. 10...1000 Time setting in µs.
Unpopulated
Links Option to enable/disable PCIe slots
where no devices are connected. Keep on link PCIe slots where no devices are con-
nected remain enabled.
Disable link PCIe slots where no devices are con-
nected are disabled to save power.
BIOS Setting Description Setting Options Effect
1) ASPM = Active State Power Management.
BIOS Setting Description Setting Op-
tions Effect
Completion Tim-
eout In device functions that support a program-
mable completion timeout, the software
permits modifying the completion timeout
value. Default The timeout range is between 50 µs
and 50 ms.
Shorter The software uses shorter timeout
ranges that are supported by the
hardware.
Longer The software uses longer timeout
ranges that are supported by the
hardware.
Disabled Disables this function.
ARI Forwarding If supported by hardware and set to en-
abled, the downstream port disables its tra-
ditional device number field being 0
enforcement.
When turning a Type1 Configuration Re-
quest into a Type0 configuration request,
permitting access to Extended functions in
an ARI device immediately below the port. Disabled Disables this function.
Enabled Enables this function.
(ARI for Alternative Routing-ID Inter-
pretation or Alternative Requester ID
Interpretation).