Maxim Integrated Secure Microcontroller - Manual (Page 117)

Secure Microcontroller User’s Guide
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Serial Port Control Register
SM0 SM1 MODE FUNCTION WORD LENGTH
BAUD CLOCK
PERIOD
0 0 Mode 0 Sync 8 bits 12 t
CLK
0 1 Mode 1 Async 10 bits Timer 1 Overflow
1 0 Mode 2 Async 11 bits 64 t
CLK
or 32 t
CLK
1 1 Mode 3 Async 11 bits Timer 1 Overflow
SCON.7, SCON.6
SM0, SM1
Mode Select Used to select the operational mode of the serial I/O port as follows:
Initialization: Cleared to 0 on any type of reset.
SCON.5
SM2
Multiple MCU Comm Used to enable the multiple microcontroller communications feature for Modes 2
and 3. When SM2 = 1, RI is activated only when serial words are received, which
cause RB8 to be set to 1.
Initialization: Cleared to 0 on any type of reset.
SCON.4
REN
Receive Enable When set to 1, the receive shift register is enabled. Disabled when cleared to 0.
Initialization: Cleared to 0 on any type of reset.
SCON.3
TB8
Xmit Bit 8 Can be set or cleared to define the state of the 9
th
data bit in Modes 2 and 3 of a
serial data word.
Initialization: Cleared to 0 on any type of reset.
SCON.2
RB8
Rcv. Bit 8 Indicates the state of the 9th data bit received while in Mode 2 or 3 operation. If
Mode 1 is selected with SM2=0, RB8 is the state of the stop bit which was
received. RB8 is not used in Mode 0.
Initialization: Cleared to 0 on any type of reset.
SCON.1
TI
Xmit Interrupt Status bit used to signal that a word has been completely shifted out in Mode 0; it
is set at the end of the 8th data bit. Set when the stop bit is transmitted.
Initialization: Cleared to 0 on any type of reset.
SCON.0:
RI
Receive Interrupt Status bit used to signal that a serial data word has been received and loaded into
the receive buffer register. In Mode 0, it is set at the end of the 8
th
bit time. It is set
at the midbit time of the incoming stop bit in all other modes of a valid received
word according to the state of SM2.
Initialization: Cleared to 0 on any type of reset.