Maxim Integrated Secure Microcontroller - Manual (Page 98)

Secure Microcontroller User’s Guide
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a) The current cycle is not part of an instruction within an interrupt service routine of an interrupt of
equal or higher priority.
b) The current cycle is not the final machine cycle of an instruction that accesses the IP or IE registers.
If the above criteria are met during IA2, then a long call will be executed during IA3 and IA4 to the
vector location of the pending interrupt of highest priority and the interrupt acknowledge sequence will be
complete. If the criteria during IA2 are not met, then the interrupt acknowledge sequence is aborted and
the interrupt request latches will be polled on the next machine cycle (which would have been IA3).
Figure 11-2. Interrupt Acknowledge Sequence
The first criteria for the continuation of an interrupt acknowledge cycle maintains the priority relationship
between interrupts and their priority level assignment. As a result, pending interrupt sources cannot be
acknowledged during the execution of service routines of interrupts that are of equal or higher priority.
Interrupt acknowledges are not allowed during an RETI instruction or during instructions which access IP
or IE in order to insure that at least one more instruction will be executed before an interrupt is serviced.
The interrupt request flags are sampled and latched during every machine cycle regardless of the other
interrupt activity on the device. Each time an attempt acknowledge takes place during IA2, it is based on
the latched value of the flags during the previous machine cycle. If the interrupt acknowledge does not
take place for one of the reasons cited above, the request flag will become subsequently inactive and the
interrupt will have been lost and will not be serviced.
When an interrupt request is acknowledged, a long call is executed to the interrupt vector location and the
2-byte return address is pushed onto the stack. In addition, an internal flag is set which indicates the
interrupt source that is being serviced. Execution then proceeds from the interrupt vector location. At the
conclusion of the interrupt service routine, an RETI instruction should be performed to return control to
the main program. The RETI performs the same action as a RET, but performs the additional operation of
clearing the interrupt-in-service flag to inform the hardware that a service routine is no longer in progress.
Therefore, an RETI should always be used to terminate an interrupt service routine.
Higher priority interrupts, which are enabled, can interrupt lower priority interrupts. According to this
rule, a higher priority interrupt could become pending just prior to machine cycle IA3 during an interrupt
acknowledge of a lower priority interrupt. This would cause the hardware to vector to the higher priority
service routine during the two machine cycles just after the long call to the lower priority interrupt so that
no instruction within the lower priority interrupt service routine would have been executed.