Maxim Integrated Secure Microcontroller - Manual (Page 26)

Secure Microcontroller User’s Guide
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Figure 4-4. Partitionable Memory Map for DS5001/DS5002 Series
The nonpartitionable mode allows the maximum amount of memory to be used on the bytewide bus. A
nonpartitionable mode would be used because the 8051 architecture is restricted to 64kB program and
64kB data (without bank switching). This means that if the maximum amount of either program or data
(or both) is needed, partitioning cannot be done. The DS5001/DS5002 series accommodates these
situations with four selections of nonpartitionable (PM = 1) memory control (see table below). These are
selected using the range bits when PM = 1. Also note the MSEL pin on DS5001/DS5002 series devices
that tells the processor whether multiple 32kB RAMs (MSEL = 1) or a 128kB RAM (MSEL = 0) is being
used. The four selections are as follows. The nonpartitionable memory map is shown in
Figure 4-5 .
Bytewide bus segments begin at 0000h.
MSEL RG1 RG0
PROGRAM
(kB)
DATA
(kB)
PROGRAM ACCESS DATA ACCESS
1 0 0 32 64 1 at 32kB, CE1 2 at 32kB, CE3 and CE4
1 0 1 64 32 2 at 32kB, CE1 and CE2 1 at 32kB, CE3
1 1 0 64 64 2 at 32kB, CE1 and CE2 2 at 32kB, CE3 and CE4
0 1 1 64 64 1 at 128kB x 8, for both program and data
Any address that does not fall into the bytewide bus area is routed to the expanded bus of Ports 0 and 2.
This could only occur for the first two settings. Note that a single 128kB device is the least expensive in
terms of component cost and size. In this case, all memory addressable by the DS5001 is stored in a
nonvolatile 128kB x 8 SRAM. When the MSEL pin = 0, and RG0 = RG1 = PM = 1, the device
automatically converts
CE1 to a chip enable, CE2 to A16, CE3 to A15, and CE4 is unused. The MSL bit,
accessible only via the bootstrap loader, selects whether the loader addresses the 64kB data or 64kB
program segment.
PES = 0
BYTEWIDE
BUS ACCESS
BYTEWIDE
BUS ACCESS
RANGE
ADDRESS
64kB
PARTITION
ADDRESS
FFFFh
0000
PROGRAM
MEMORY
DATA
MEMORY
= BYTEWIDE ACCESS = EXPANDED BUS ACCESS ON PORT 0/2
(NV RAM)