ADLINK aTCA-N700 - Manual (Page 28)

aTCA-N700 HW Users Guide
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data rate operating at up to 667MHz of clock. Each DIMM interface is in 64bit + ECC (72bit).
Two dual-rank DIMMs, x8, x16bit DRAM parts, registered and un-buffered DIMMs are
supported. The DIMM configuration is done through the TWSI1 interface.
6.3. Boot/OS Memories on Boot-Bus
The CN6880 has an internal boot module, which provides an external booting device
interface through a general purpose bus, or so called Boot-Bus. The Boot-Bus has 32bit
address/data multiplexed lines, programmable to 8/16bit data width. The boot and the OS
memories are installed through the Boot-Bus interface as illustrated in Figure 6-4. The NOR
flash is used for u-boot image storage and the NAND flash is for OS/APP image storage.
Both memories support 1:1 hardware redundancy.
The NOR flashes are installed in 2 (primary, secondary) x 8MB fashion per NPU on CE0.
Likewise, the NAND flashes are installed in 2 (primary, secondary) x 8GB fashion per NPU
on CE1, 2, 3 and 4.
Figure 6-4 Boot Memories
6.4. Data Plane Interface
The CN6880 data plane interfaces are provided via QLM0 ~ QLM4, which are then,
connected to the different types of internal interface modules.
On the board, QLM0 is connected to provide 2x RXAUI (20Gbps@4 lanes) to save SerDes
lanes.
QLM2 and QLM4 are configured to provide 2x XAUI (20Gbps@8 lanes)
These 4x 10G ports are connected to the fabric switch BCM56842 as can be seen in Figure
6-5. Note that each RXAUI interface consumes two SerDes lanes, where each lane running
at 6.25Gbps, whereas each XAUI consumes four lanes, each [email protected].