Altera Remote Update IP Core - Manual (Page 39)

a. Browse to the folder in which you unzipped the files and open the Application_Image.qpf .
b. Click Yes in the message box "Do you want to overwrite the database for C:/your working
directory/Application_Image.qpf created by Quatus II 64-Bit Version 13.0.a Build 232 Service Pack
1 SJ Full version?"
c. On the Processing menu, choose Start Compilation.
d. Click OK when the full compilation successful dialog box appears.
e. Application_Image.sof will be generated in c:\your working directory\output_files .
f. Click close project in the file menu.
4. 4. Compile Factory Image:
a. Browse to the folder in which you unzipped the files and open the
SVRSU.qpf .
b. Click Yes in the message box "Do you want to overwrite the database for
C:/your working directory/
Application_Image.qpf created by Quatus II 64-Bit Version 13.0.a Build 232 Service Pack 1 SJ Full
version?"
c. Choose Start Compilation on the Processing menu.
d. Click OK when the full compilation successful dialog box appears.
e.
Factory_Image.sof will be generated in c:\your working directory\output_files .
5. On the File Menu, click Convert Programming Files and select the detail as shown below:
• Programming File type: JTAG Indirect Configuration File (.jic)
• Select Configuration Device: EPCQ 128
• Mode: Active Serial x4
• File name: c:/your working directory/output_file.jic
• Flash loader: click add device and choose 5CEFA7ES
• SOFT DATA PAGE_0: click Add File and select the factory image file ( SVRSU.sof )
• SOFT DATA PAGE_0: click Add File and select the Application image file ( Application_Image.sof )
• Click Generate.
• Click OK when the dialogue box of .jic file successfully generated appears.
6. On the Tool Menu, click Programmer:
a. Make sure the board is power up and the USB Blaster is connected between computer and the
board. This design example uses USB Blaster and JTAG mode.
b. Click Auto Detect.
c. Right click on the 5CEFA7ES and select change file.
d. Browse to the
output_file.jic that was generated in previous steps.
e. Tick the Program/Configure checkbox and click Start.
f. Configuration successful indicates the FPGA is configured successfully.
Related Information
Design Example File
Document Revision History
The following table lists the revision history.
UG-31005
2015.04.07
Document Revision History 39
Altera Remote Update IP Core User Guide Altera Corporation
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