Altera Remote Update IP Core - Manual (Page 5)

7. To generate an HDL instantiation template that you can copy and paste into your text editor, click
Generate > HDL Example.
8. Click Finish. The parameter editor adds the top-level
.qsys file to the current project automatically. If
you are prompted to manually add the
.qsys
file to the project, click Project > Add/Remove Files in
Project to add the file.
9. After generating and instantiating your IP variation, make appropriate pin assignments to connect
ports.
Figure 5: IP Parameter Editor
View IP port
and parameter
details
Apply preset parameters for
specific applications Specify your IP variation name
and target device
Upgrading IP Cores
IP core variants generated with a previous version of the Quartus II software may require upgrading
before use in the current version of the Quartus II software. Click Project > Upgrade IP Components to
identify and upgrade IP core variants.
The Upgrade IP Components dialog box provides instructions when IP upgrade is required, optional, or
unsupported for specific IP cores in your design. You must upgrade IP cores that require upgrade before
you can compile the IP variation in the current version of the Quartus II software. Most Altera IP cores
support automatic upgrade.
Note: Upgrading IP cores for Arria 10 and later devices appends a unique identifier to the original IP
core entity name(s), while leaving the IP instance name(s) in tact. There is no requirement to
update these entity references in any supporting Quartus II file, such as the Quartus II Settings File
( .qsf ), Synopsys Design Constraints File ( .sdc ), or SignalTap File ( .stp ). The Quartus II software
UG-31005
2015.04.07
Upgrading IP Cores 5
Altera Remote Update IP Core User Guide Altera Corporation
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