Note 1) – Altera FIR Compiler User Manual
Page 21
Chapter 2: Getting Started
2–7
MegaWizard Plug-In Manager Flow
© May 2011
Altera Corporation
<variation name>.vec
Quartus II vector file. This file provides simulation test vectors to be used for
simulating the customized FIR MegaCore function variation with the Quartus II
software.
<variation name>.vhd or .v
A VHDL or Verilog HDL file that defines a VHDL or Verilog HDL top-level description
of the custom MegaCore function variation. Instantiate the entity defined by this file
inside of your design. Include this file when compiling your design in the Quartus II
software.
<variation name>.vho or .vo
A VHDL or Verilog HDL output file that defines the IP functional simulation model.
<variation name>_bb.v
A Verilog HDL black-box file for the MegaCore function variation. Use this file when
using a third-party EDA tool to synthesize your design.
<variation name>_coef_in_mlab.txt
<variation name>_coef_int.txt
Text files that provides coefficient inputs for the MATLAB testbench model.
<variation name>_coef_n_inv.hex
<variation name>_coef_n.hex
<variation name>_zero.hex
Memory initialization files in INTEL Hex format. These files are required both for
simulation with IP functional simulation models and synthesis using the Quartus II
software.
<variation name>_constraints.tcl
Constraints setting Tcl file for Quartus II synthesis. This file contains the necessary
constraints to achieve FIR Filter size and speed.
<variation name>_input.txt
This text file provides simulation data for the MATLAB model and the simulation
testbench.
<variation name>_mlab.m
This MATLAB M-File provides the kernel of the MATLAB simulation model for the
customized FIR MegaCore function variation.
<variation name>_model.m
This MATLAB M-File provides a MATLAB simulation model for the customized FIR
MegaCore function variation.
<variation name>_msim.tcl
This Tcl script can be used to simulate the VHDL testbench together with the
simulation model of the customized FIR MegaCore function variation.
<variation name>_nativelink.tcl
A Tcl script that can be used to assign NativeLink simulation testbench settings to the
Quartus II project.
<variation name>_param.txt
This text file records all output parameters for customized FIR MegaCore function
variation.
<variation name>_silent_param.txt
This text file records all input parameters for customized FIR MegaCore function
variation.
<variation name>_core.vhd
<variation name>_st.v
<variation name>_st_s.v
<variation name>_st_u.v
<variation name>_st_wr.v
Generated FIR Filter netlists. These files are required for Quartus II synthesis and are
added to your current Quartus II project.
tb_<variation name>.vhd
This VHDL file provides a testbench for the customized FIR MegaCore function
variation.
Notes to
(1) <variation name> is a prefix variation name supplied automatically by IP Toolbench.
(2) The <entity name> prefix is added automatically. The VHDL code for each MegaCore instance is generated dynamically when you click Finish
so that the <entity name> is different for every instance. It is generated from the <variation name> by appending _ast.
Table 2–1. Generated Files (Part 2 of 2)
(Note 1)
,
(2)
Filename
Description