Intel 253666-024US - Manual (Page 179)

Vol. 2A 3-133
INSTRUCTION SET REFERENCE, A-M
CMPPS—Compare Packed Single-Precision Floating-Point Values
THEN DEST95:64] ← FFFFFFFFH;
ELSE DEST[95:64] ← 00000000H; FI;
IF CMP3
=
TRUE
THEN DEST[127:96] ← FFFFFFFFH;
ELSE DEST[127:96] ← 00000000H; FI;
Intel C/C++ Compiler Intrinsic Equivalents
CMPPS for equality __m128 _mm_cmpeq_ps(__m128 a, __m128 b)
CMPPS for less-than __m128 _mm_cmplt_ps(__m128 a, __m128 b)
CMPPS for less-than-or-equal __m128 _mm_cmple_ps(__m128 a, __m128 b)
CMPPS for greater-than __m128 _mm_cmpgt_ps(__m128 a, __m128 b)
CMPPS for greater-than-or-equal__m128 _mm_cmpge_ps(__m128 a, __m128 b)
CMPPS for inequality
__m128 _mm_cmpneq_ps(__m128 a, __m128 b)
CMPPS for not-less-than __m128 _mm_cmpnlt_ps(__m128 a, __m128 b)
CMPPS for not-greater-than __m128 _mm_cmpngt_ps(__m128 a, __m128 b)
CMPPS for not-greater-than-or-equal__m128 _mm_cmpnge_ps(__m128 a, __m128 b)
CMPPS for ordered
__m128 _mm_cmpord_ps(__m128 a, __m128 b)
CMPPS for unordered __m128 _mm_cmpunord_ps(__m128 a, __m128 b)
CMPPS for not-less-than-or-equal__m128 _mm_cmpnle_ps(__m128 a, __m128 b)
SIMD Floating-Point Exceptions
Invalid if SNaN operand and invalid if QNaN and predicate as listed in above table,
Denormal.
Protected Mode Exceptions
#GP(0) For an illegal memory operand effective address in the CS, DS,
ES, FS or GS segments.
If a memory operand is not aligned on a 16-byte boundary,
regardless of segment.
#SS(0) For an illegal address in the SS segment.
#PF(fault-code) For a page fault.
#NM If CR0.TS[bit 3] = 1.
#XM If an unmasked SIMD floating-point exception and CR4.OSXM-
MEXCPT[bit 10] = 1.
#UD If an unmasked SIMD floating-point exception and CR4.OSXM-
MEXCPT[bit 10] = 0.
If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.