Intel 253666-024US User Manual

Page 271

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Vol. 2A 3-225

INSTRUCTION SET REFERENCE, A-M

CVTSI2SD—Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value

CVTSI2SD—Convert Doubleword Integer to Scalar Double-Precision

Floating-Point Value

Description

Converts a signed doubleword integer (or signed quadword integer if operand size is
64 bits) in the source operand (second operand) to a double-precision floating-point
value in the destination operand (first operand). The source operand can be a
general-purpose register or a memory location. The destination operand is an XMM
register. The result is stored in the low quadword of the destination operand, and the
high quadword left unchanged.
In 64-bit mode, the instruction can access additional registers (XMM8-XMM15,
R8-R15) when used with a REX.R prefix. Use of the REX.W prefix promotes the
instruction to 64-bit operands. See the summary chart at the beginning of this
section for encoding data and limits.

Operation

IF 64-Bit Mode And OperandSize = 64

THEN

DEST[63:0] ← Convert_Integer_To_Double_Precision_Floating_Point(SRC[63:0]);

(* DEST[127:64] unchanged *)

ELSE

DEST[63:0] ← Convert_Integer_To_Double_Precision_Floating_Point(SRC[31:0]);

(* DEST[127:64] unchanged *)

FI;

Intel C/C++ Compiler Intrinsic Equivalent

CVTSI2SD

__m128d _mm_cvtsi32_sd(__m128d a, int b)

SIMD Floating-Point Exceptions

None.

Opcode

Instruction

64-Bit

Mode

Compat/

Leg Mode

Description

F2 0F 2A /r

CVTSI2SD xmm,

r/m32

Valid

Valid

Convert one signed doubleword

integer from r/m32 to one

double-precision floating-point

value in xmm.

F2 REX.W 0F 2A /r

CVTSI2SD xmm,

r/m64

Valid

N.E.

Convert one signed quadword

integer from r/m64 to one

double-precision floating-point

value in xmm.

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