Intel 253666-024US User Manual

Page 445

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Vol. 2A 3-399

INSTRUCTION SET REFERENCE, A-M

FSUB/FSUBP/FISUB—Subtract

The FISUB instructions convert an integer source operand to double extended-preci-
sion floating-point format before performing the subtraction.
Table 3-43 shows the results obtained when subtracting various classes of numbers
from one another, assuming that neither overflow nor underflow occurs. Here, the
SRC value is subtracted from the DEST value (DEST − SRC = result).
When the difference between two operands of like sign is 0, the result is +0, except for

the round toward −∞ mode, in which case the result is −0. This instruction also guaran-

tees that +0 − (−0) = +0, and that −0 − (+0) = −0. When the source operand is an integer 0,

it is treated as a +0.
When one operand is ∞, the result is ∞ of the expected sign. If both operands are ∞ of

the same sign, an invalid-operation exception is generated.

This instruction’s operation is the same in non-64-bit modes and 64-bit mode.

Operation

IF Instruction = FISUB

THEN

DEST ← DEST

ConvertToDoubleExtendedPrecisionFP(SRC);

ELSE (* Source operand is floating-point value *)

DEST ← DEST

SRC;

FI;

Table 3-43. FSUB/FSUBP/FISUB Results

SRC

−F or −I

−0

+0

+F or +I

+

NaN

*

NaN

−F

+

±F or ±0

DEST

DEST

−F

NaN

DEST

−0

+

−SRC

±0

−0

−SRC

NaN

+0

+

−SRC

+0

±0

−SRC

NaN

+F

+

+F

DEST

DEST

±F or ±0

NaN

+

+

+

+

+

+

*

NaN

NaN

NaN

NaN

NaN

NaN

NaN

NaN

NaN

NOTES:

F Means finite floating-point value.
I Means integer.
* Indicates floating-point invalid-arithmetic-operand (#IA) exception.

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