Intel 253666-024US - Manual (Page 589)

Vol. 2A 3-543
INSTRUCTION SET REFERENCE, A-M
LGDT/LIDT—Load Global/Interrupt Descriptor Table Register
Real-Address Mode Exceptions
#UD If source operand is not a memory location.
If the LOCK prefix is used.
#GP If a memory operand effective address is outside the CS, DS,
ES, FS, or GS segment limit.
#SS If a memory operand effective address is outside the SS
segment limit.
Virtual-8086 Mode Exceptions
#UD If source operand is not a memory location.
If the LOCK prefix is used.
#GP(0) The LGDT and LIDT instructions are not recognized in virtual-
8086 mode.
#GP If the current privilege level is not 0.
Compatibility Mode Exceptions
Same exceptions as in protected mode.
64-Bit Mode Exceptions
#SS(0) If a memory address referencing the SS segment is in a non-
canonical form.
#GP(0) If the current privilege level is not 0.
If the memory address is in a non-canonical form.
#UD If source operand is not a memory location.
If the LOCK prefix is used.
#PF(fault-code) If a page fault occurs.