Intel 253666-024US - Manual (Page 295)

Vol. 2A 3-249
INSTRUCTION SET REFERENCE, A-M
CVTTSD2SI—Convert with Truncation Scalar Double-Precision Floating-Point Value to
Signed Doubleword Integer
CVTTSD2SI—Convert with Truncation Scalar Double-Precision Floating-
Point Value to Signed Doubleword Integer
Description
Converts a double-precision floating-point value in the source operand (second
operand) to a signed doubleword integer (or signed quadword integer if operand size
is 64 bits) in the destination operand (first operand). The source operand can be an
XMM register or a 64-bit memory location. The destination operand is a general-
purpose register. When the source operand is an XMM register, the double-precision
floating-point value is contained in the low quadword of the register.
When a conversion is inexact, a truncated (round toward zero) result is returned. If a
converted result is larger than the maximum signed doubleword integer, the floating-
point invalid exception is raised. If this exception is masked, the indefinite integer
value (80000000H) is returned.
In 64-bit mode, the instruction can access additional registers (XMM8-XMM15,
R8-R15) when used with a REX.R prefix. Use of the REX.W prefix promotes the
instruction to 64-bit operation. See the summary chart at the beginning of this
section for encoding data and limits.
Operation
IF 64-Bit Mode and OperandSize = 64
THEN
DEST[63:0] ← Convert_Double_Precision_Floating_Point_To_
Integer_Truncate(SRC[63:0]);
ELSE
DEST[31:0] ← Convert_Double_Precision_Floating_Point_To_
Integer_Truncate(SRC[63:0]);
FI;
Opcode Instruction 64-Bit
Mode
Compat/
Leg Mode
Description
F2 0F 2C /r CVTTSD2SI r32,
xmm/m64
Valid Valid Convert one double-precision
floating-point value from
xmm/m64 to one signed
doubleword integer in r32 using
truncation.
F2 REX.W 0F 2C /r CVTTSD2SI r64,
xmm/m64
Valid N.E. Convert one double precision
floating-point value from
xmm/m64 to one
signedquadword integer in r64
using truncation.