National Instruments PCI-1200 User Manual
Page 95
Index
© National Instruments Corporation
I-3
input polarity, 2-3
analog output polarity, 2-3
controlled acquisition mode, 4-8
Counter 0 on 82C53(A) counter/timer, 3-19
Counter 1 on 82C53(A) counter/timer, 3-19
counter/timers, 4-3 to 4-5
circuitry (figure), 4-4
custom cabling, 1-5 to 1-6
customer communication, xii, B-1 to B-2
D
DAC timing, 4-12
DAC0OUT signal (table), 3-3
DAC1OUT signal (table), 3-3
DACWRT signal, 3-22
DAQ and general-purpose timing signal
connections, 3-18 to 3-30
DAQ timing connections, 3-19 to 3-23
general-purpose timing connections,
3-23 to 3-26
pins, 3-18 to 3-19
timing specifications, 3-27 to 3-30
DAQ operations, 4-7 to 4-9
controlled acquisition mode, 4-8
freerun acquisition mode, 4-8
interval scanning acquisition mode,
4-8 to 4-9
multiple-channel scanned data
acquisition, 4-9
single-channel data acquisition, 4-9
DAQ rates, 4-10 to 4-11
explanation, A-5 to A-6
maximum recommended rates
(table), 4-10
settling time vs. gain (table), 4-10
DAQ timing connections, 3-19 to 3-23. See
also general-purpose timing signal
connections.
EXTCONV* signal, 3-19 to 3-21
EXTCONV* signal timing (figure), 3-19
EXTTRIG signal, 3-19 to 3-20
EXTUPDATE* signal, 3-22 to 3-23
interval scanning, 3-21
pins, 3-18 to 3-19
posttrigger and pretrigger modes,
3-19 to 3-20
posttrigger timing (figure), 3-20
pretrigger timing (figure), 3-21
data acquisition timing connections. See DAQ
timing connections.
DATA signal (table), 3-27
DGND signal (table), 3-3
DIFF input
configuration, 2-5
definition (table), 2-4
recommended input configurations
(table), 3-8
differential connections
DIFF configuration, 3-9
floating signal sources, 3-11 to 3-12
ground-referenced signal sources, 3-10
purpose and use, 3-9
when to use, 3-9
differential nonlinearity (DNL)
analog input, A-4
analog output, A-7
digital I/O circuitry
illustration, 4-12
theory of operation, 4-12 to 4-13
digital I/O signal connections
illustration, 3-17
logical inputs and outputs, 3-17 to 3-18
pins, 3-16
Port C pin connections, 3-18
digital I/O specifications, A-7 to A-8
digital trigger, A-9
dither circuitry
explanation, A-5
theory of operation, 4-6 to 4-7
DNL (differential nonlinearity)
analog input, A-4