Detailed instrument operation cycle – VXI VT1422A User Manual

Page 102

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100 Programming the VT1422A for Data Acquisition and Control

Chapter 4

Detailed Instrument

Operation Cycle

Figure 4-2 illustrates the timing of all these operations and describes the
VT1422A's input-update-execute algorithms-output phases. This
cycle-based design is desirable because it results in deterministic operation
of the VT1422A. That is, the input channels are always scanned and the
output channels are always written at pre-defined intervals. Note, too, that
any number of input channels or output channels are accessible by any of up
to 32 user-written algorithms. The algorithms are named ALG1-ALG32 and
execute in numerical order.

In Phase 1, all input channels specified in the ROUTe:SEQuence:DEFine
command and/or referenced in downloaded algorithms are scanned.

Phase 1A is for Runtime Remote Scan Verification and is optional. When one
or more special scan status variables (S1xx) are included in an algorithm,
this time is required to evaluate the scan status of each VT1539A SCP
channel reference by a status variable. The time required is 230 µs + 40 µs
* (number of S1xx variables referenced). If no status variables are
referenced in any algorithms, then Phase 1A is not executed.

Notice the Update Window (Phase 2) illustrated in Figure 4-2. This window
has a user-specified length and is used to accept and make changes to local
and global variables from the supervisory computer. Up to 512 scalar or
array changes can be made while executing algorithms. Special care was
taken to make sure all changes take place at the same time so that any
particular algorithm or group of algorithms all operate on the new changes
at a user-specified time. This does not mean that all scalar and array changes
have to be received during one cycle to become effective at the next cycle.
On the contrary, it may take several cycles to download new values,
especially when trying to re-write 1024 element arrays and especially when
the trigger cycle time is very short.

There are multiple times between the base triggers where scalar and array
changes can be accepted from the supervisory computer and these changes
are kept in a holding buffer until the supervisory computer instructs the
changes to take effect. These changes then take place during the Update
window and take effect BEFORE algorithms start executing. The
"do-update-now" signal can be sent by command (ALG:UPD) or by a
change in a digital input state (ALG:UPD:CHAN). In either case, the
programmer has control over when the new changes take effect.

The VT1422A's ability to execute programs directly on the card and its fast
execution speed give the programmer real-time response to changing
conditions. Plus, programming the card has been made very easy to
understand. The C language was chosen for writing user programs as this
language is already considered the industry standard. Choosing C allows the
user to write algorithms on PCs or UNIX workstations that have
C compilers, so they can debug algorithms before execution on the card. The
VT1422A also provides good debugging tools that permit users to determine
worst-case execution speed, monitor variables while running, and
selectively enabling/disabling any of the VT1422A's 32 algorithms.

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