Configuring the enable registers, Reading the status byte – VXI VT1422A User Manual

Page 148

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146 Programming the VT1422A for Data Acquisition and Control

Chapter 4

Configuring the

Enable Registers

In Figure 4-10, note that each Status Group has an Enable Register. These
control whether or not the occurrence of an individual status condition will
be reported by the group’s summary bit in the Status Byte.

Questionable Data Group Examples

To have only the "FIFO Overflowed" condition reported by the QUE bit
(bit 3) of the Status Byte, execute:

STAT:QUES:ENAB 1024

1024=decimal value for bit 10

To have only the "FIFO Overflowed" and "Setup Changed" conditions
reported, execute:

STAT:QUES:ENAB 9216

9216=decimal sum of values for
bits 10 and 13

Operation Status Group Examples

To have only the "FIFO Half Full" condition reported by the OPR bit (bit 7)
of the Status Byte, execute:

STAT:OPER:ENAB 1024

1024=decimal value for bit 10

To have only the "FIFO Half Full" and "Scan Complete" conditions
reported, execute:

STAT:OPER:ENAB 1280

1280=decimal sum of values for
bits 10 and 8

Standard Event Group Examples

To have only the "Query Error", "Execution Error," and "Command Error"
conditions reported by the ESB bit (bit 5) of the Status Byte, execute:

*ESE 52

52=decimal sum of values for
bits 2, 4, and 5

Reading the Status

Byte

To check if any enabled events have occurred in the status system, first read
the Status Byte using the *STB? query. If the Status Byte is all zeros, there is
no summary information being sent from any of the status groups. If the
Status Byte is other than zero, one or more enabled events have occurred. The
Status Byte bit values are interpreted and act as follows:

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