Rainbow Electronics W90P710CDG User Manual
Page 383
W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 383 -
Revision B2
AIC Interrupt Mask Register (AIC_IMR)
REGISTER ADDRESS R/W
DESCRIPTION
RESET
VALUE
AIC_IMR
0xFFF8_2114
R
Interrupt Mask Register
0x0000_0000
31
30
29
28
27
26
25
24
IM31 IM30 IM29 IM28 IM27 IM26 IM25
IM24
23
22
21
20
19
18
17
16
IM23 IM22 IM21 IM20 IM19 IM18 IM17
IM16
15
14
13
12
11
10
9
8
IM15 IM14 IM13 IM12 IM11 IM10 IM9 IM8
7
6
5
4
3
2
1
0
IM7 IM6 IM5 IM4 IM3 IM2 IM1
RESERVED
BITS
DESCRIPTIONS
[31:1]
IM x
IM
x: Interrupt Mask
This bit determines whether the corresponding interrupt channel is
enabled or disabled. Every interrupt channel can be active no matter
whether it is enabled or disabled. If an interrupt channel is enabled, it
does not definitely mean it is active. Every interrupt channel can be
authorized by the AIC only when it is both active and enabled.
0 = Corresponding interrupt channel is disabled
1 = Corresponding interrupt channel is enabled
[0]
Reserved
Reserved
AIC Output Interrupt Status Register (AIC_OISR)
REGISTER ADDRESS R/W
DESCRIPTION
RESET
VALUE
AIC_OISR 0xFFF8_2118
R
Output Interrupt Status Register
0x0000_0000
31
30
29
28
27
26
25
24
RESERVED
23
22
21
20
19
18
17
16
RESERVED
15
14
13
12
11
10
9
8
RESERVED
7
6
5
4
3
2
1
0
RESERVED IRQ
FIQ