Rainbow Electronics W90P710CDG - Manual (Page 544)

W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 545 - Revision B2
UART2 Control Register Map
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
UART2_RBR 0xFFF8_0200 R Receive Buffer Register (DLAB = 0) Undefined
UART2_THR 0xFFF8_0200 W Transmit Holding Register (DLAB = 0) Undefined
UART2_IER 0xFFF8_0204 R/W Interrupt Enable Register (DLAB = 0) 0x0000_0000
UART2_DLL 0xFFF8_0200 R/W
Divisor Latch Register (LS)
(DLAB = 1)
0x0000_0000
UART2_DLM 0xFFF8_0204 R/W
Divisor Latch Register (MS)
(DLAB = 1)
0x0000_0000
UART2_IIR 0xFFF8_0208 R Interrupt Identification Register 0x8181_8181
UART2_FCR 0xFFF8_0208 W FIFO Control Register Undefined
UART2_LCR 0xFFF8_020C R/W Line Control Register 0x0000_0000
UART2_MCR 0xFFF8_0210 R/W Modem Control Register 0x0000_0000
UART2_LSR 0xFFF8_0214 R Line Status Register 0x6060_6060
UART2_MSR 0xFFF8_0218 R MODEM Status Register 0x0000_0000
UART2_TOR 0xFFF8_021C R Time Out Register 0x0000_0000
UART2_IRCR 0xFFF8_0220 R/W IrDA Control Register 0x0000_0040
UART3 Control Register Map
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
UART3_RBR 0xFFF8_0300 R Receive Buffer Register (DLAB = 0) Undefined
UART3_THR 0xFFF8_0300 W Transmit Holding Register (DLAB = 0) Undefined
UART3_IER 0xFFF8_0304 R/W Interrupt Enable Register (DLAB = 0) 0x0000_0000
UART3_DLL 0xFFF8_0300 R/W
Divisor Latch Register (LS)
(DLAB = 1)
0x0000_0000
UART3_DLM 0xFFF8_0304 R/W
Divisor Latch Register (MS)
(DLAB = 1)
0x0000_0000
UART3_IIR 0xFFF8_0308 R Interrupt Identification Register 0x8181_8181
UART3_FCR 0xFFF8_0308 W FIFO Control Register Undefined
UART3_LCR 0xFFF8_030C R/W Line Control Register 0x0000_0000
UART3_MCR 0xFFF8_0310 R/W Modem Control Register 0x0000_0000
UART3_LSR 0xFFF8_0314 R Line Status Register 0x6060_6060
UART3_MSR 0xFFF8_0318 R MODEM Status Register 0x0000_0000
UART3_TOR 0xFFF8_031C R Time Out Register 0x0000_0000