System control and reset, Resetting the avr, Reset sources – Rainbow Electronics ATmega32L User Manual

Page 34: Atmega32(l)

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34

ATmega32(L)

2503C–AVR–10/02

System Control and
Reset

Resetting the AVR

During Reset, all I/O Registers are set to their initial values, and the program starts exe-
cution from the Reset Vector. The instruction placed at the Reset Vector must be a JMP
– absolute jump – instruction to the reset handling routine. If the program never enables
an interrupt source, the Interrupt Vectors are not used, and regular program code can
be placed at these locations. This is also the case if the Reset Vector is in the Applica-
tion section while the Interrupt Vectors are in the Boot section or vice versa. The circuit
diagram in Figure 15 shows the reset logic. Table 15 defines the electrical parameters of
the reset circuitry.

The I/O ports of the AVR are immediately reset to their initial state when a reset source
goes active. This does not require any clock source to be running.

After all reset sources have gone inactive, a delay counter is invoked, stretching the
Internal Reset. This allows the power to reach a stable level before normal operation
starts. The time-out period of the delay counter is defined by the user through the
CKSEL Fuses. The different selections for the delay period are presented in “Clock
Sources” on page 23.

Reset Sources

The ATmega32 has five sources of reset:

Power-on Reset. The MCU is reset when the supply voltage is below the Power-on
Reset threshold (V

POT

).

External Reset. The MCU is reset when a low level is present on the RESET pin for
longer than the minimum pulse length.

Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and
the Watchdog is enabled.

Brown-out Reset. The MCU is reset when the supply voltage V

CC

is below the

Brown-out Reset threshold (V

BOT

) and the Brown-out Detector is enabled.

JTAG AVR Reset. The MCU is reset as long as there is a logic one in the Reset
Register, one of the scan chains of the JTAG system. Refer to the section “IEEE
1149.1 (JTAG) Boundary-scan” on page 223 for details.

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