Cirrus Logic CS4234 - Manual (Page 47)

DS899F1 47
CS4234
4.7 Reset Line
The reset line of the CS4234 is used to place the device into a reset condition. In this condition, all of the
values of the CS4234 control port are set to their default values. This mode of operation is the lowest power
mode of operation for the CS4234 and should be used whenever the device is not operating in order to save
power. During the power up and power down sequence, it is often necessary for the CS4234 devices to be
placed into (and taken out of) reset at a different moment in time than the amplifiers to which they are con-
nected in order to minimize audible clicks and pops during the sequence. For this reason, it is advisable to
run separate reset lines for each type of device, i.e. one reset line for the CS4234 devices and one for the
CS44417 devices.
4.8 Error Reporting and Interrupt Behavior
The CS4234 is equipped with a suite of error reporting and protection. The types of errors that are detected,
the notification method for these errors, and the steps needed to clear the errors are detailed in
Table 10 .
It is important to note that the interrupt notification bits for all of the errors are triggered on the edge of the
occurrence of the event. They are not level-triggered and therefore do not indicate the presence of an error
in real time. This means that, a “1” in the error’s respective field inside the Interrupt Notification register only
indicates that the error occurred since the last time the register was cleared and not necessarily that the
error is currently occurring.
Table 10. Error Reporting and Interrupt Behavior Details
Note:
36. This error is provided to aid in troubleshooting during software development. Entry into the test mode
of the device may cause permanent damage to the device and should not be done intentionally.
4.8.1 Interrupt Masking
An occurrence of any of the errors mentioned above will cause the interrupt line to engage in order to no-
tify the system controller that an error occurred. If it is preferred that the error not cause the interrupt line
to engage, this error can be masked in its respective mask register. It is important to note that, in the event
of an error, the interrupt notification bit for the respective error will reflect the occurrence of the event, re-
Name of Error Event(s) that caused the error
Outputs muted upon
occurrence?
All PDNx bits must be
set and then cleared to
resume normal
operation?
Disallowed Test Mode
Entry
(Note 36)
Device has entered test mode due
to an errant I²C write. No No
Serial Port Error FS/LRCK or SCLK has become
invalid. Yes Yes
Clocking Error The speed mode which the device
is receiving is different than the
speed mode set in the
SPEED
MODE[1:0] bits, or the PLL is
unlocked from input signal.
Yes Yes
ADCx Overflow ADC inputs are larger than the per-
mitted full scale signal. No No
Normal operation continues
but audible distortion occurs.
DACx Clip DAC output level is larger than the
available rail voltage. No No
Normal operation continues
but audible distortion occurs.