Cirrus Logic CS4234 - Manual (Page 5)

DS899F1 5
CS4234
Figure 41. SSM DAC Passband Ripple .................................................................................................... 71
Figure 42. DSM DAC Stopband Rejection ................................................................................................ 72
Figure 43. DSM DAC Transition Band ...................................................................................................... 72
Figure 44. DSM DAC Transition Band (Detail) .......................................................................................... 72
Figure 45. DSM DAC Passband Ripple .................................................................................................... 72
Figure 46. Package Drawing ..................................................................................................................... 73
Figure 47. Progression of the Tracking Signal Through the DAC5 Path ................................................... 75
Figure 48. Directly Proportional vs. Indirectly Proportional Modes of Operation ....................................... 77
Figure 49. DAC5 TPS Modes of Operation ............................................................................................... 78
Figure 50. DAC5 Volume and TPS Offset Controls .................................................................................. 78
LIST OF TABLES
Table 1. Speed Modes .............................................................................................................................. 26
Table 2. Common Clock Frequencies ....................................................................................................... 27
Table 3. Master Mode Left Justified and I²S Clock Ratios ........................................................................ 27
Table 4. Slave Mode Left Justified and I²S Clock Ratios .......................................................................... 28
Table 5. Slave Mode TDM Clock Ratios ................................................................................................... 28
Table 6. Unmasking SDIN1 Data from DAC5 Path ................................................................................... 36
Table 7. Unmasking SDIN2 Data from DAC5 Path ................................................................................... 37
Table 8. Soft Ramp Rates ......................................................................................................................... 46
Table 9. Noise Gate Bit Depth Settings .................................................................................................... 46
Table 10. Error Reporting and Interrupt Behavior Details ......................................................................... 47