2 interrupt line operation, 3 error reporting and clearing, Cs4234 – Cirrus Logic CS4234 User Manual
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DS899F1
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CS4234
gardless of the setting of the mask bit. Setting the mask bit only prevents the interrupt pin from being
flagged upon the occurrence.
4.8.2
Interrupt Line Operation
As mentioned previously, the interrupt line of the CS4234 will be pulled low or high (depending on the set-
tings of the
) after an interrupt condition occurs, pro-
vided that the event is not masked in the mask register. If the CS4234’s interrupt line is to be connected
onto a single bus with other devices, it is advisable to use it in the open drain mode of operation. If no
other devices are connected to the interrupt line, it may be used in the CMOS mode of operation. When
used in the open drain configuration, it is necessary to connect a pull-up resistor to this net, which will
ensure a known state on the net when no error is present. Please refer to the typical connection diagram
for the appropriate pull-up resistor value.
4.8.3
Error Reporting and Clearing
In the event of an error, the interrupt line will be engaged - provided the mask bit for that error is not set.
When the interrupt notification registers are read to determine the source of the error, the mask bit for
whichever error occurred will be set automatically by the CS4234. The system controller should begin to
take corrective action to clear the error. Once the error has been cleared, the system controller should
clear the mask bit in the appropriate mask register to ensure that a subsequent occurrence of the error
will cause the interrupt line to engage appropriately. This behavior is detailed in
.