1 x volume control, 21 interrupt control (address 1eh), 1 int mode – Cirrus Logic CS4234 User Manual
Page 66: 2 interrupt pin polarity, Cs4234
DS899F1
66
CS4234
6.20 Master and DAC1-5 Volume Control (Address 17h, 18h, 19h, 1Ah, 1Bh, and 1Ch)
6.20.1
x Volume Control
Sets the level of the x Volume Control. Each volume step equals
6.02
/
16
dB ~= 0.38 dB. See
for the muting behavior of these volume registers.
6.21 Interrupt Control (Address 1Eh)
6.21.1
INT MODE
Sets the behavior mode of the interrupt registers of the device. In the default configuration, if the interrupt
notification registers are read and any error is found to have occurred since the last clearing of that reg-
ister, the device will automatically set the corresponding mask bit in the appropriate mask register. In the
nondefault configuration, the mask bits will not be set automatically.
6.21.2
Interrupt Pin Polarity
Sets the output mode of the interrupt pin.
7
6
5
4
3
2
1
0
x VOLUME[7:0]
x VOLUME
x Volume is: [dB]
00000000
+6.02
00001111
+0.38
00010000
0
00010001
-0.38
00011000
-3.01
...
...
11101100
-82.78 (most total attenuation before mute for DAC5)
11101101
-83.15 (least total attenuation before unmute for DAC5)
...
...
11111110
-89.55 (most total attenuation before mute for DAC1-4)
11111111
-89.92 (least total attenuation before unmute for DAC1-4)
7
6
5
4
3
2
1
0
INT MODE
INT POL [1:0]
Reserved
Reserved
Reserved
Reserved
Reserved
INT MODE
Upon the reading of an error out of the interrupt notification bits, the CS4234 will:
0
Automatically set the corresponding mask bit.
1
Not set the corresponding mask bit.
INT POL
Output mode of the interrupt pin is:
00
Active High
01
Active Low
10
Active Low/Open Drain
11
Reserved