Cirrus Logic EP7312 - Manual (Page 53)

DS508F2
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Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved) 53
EP7312
High-Performance, Low-Power System on Chip
Revision History
Revision Date Changes
PP5 JAN 2004 Preliminary release. Updated SDRAM timing.
F1 AUG 2005 Updated ordering information. Added MSL data.
F2 MAR 2011 Removed all lead-containing device ordering information. Removed 204-pin
TFBGA package option.