ADLINK PXI-2502 - Manual (Page 32)

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• Operation Theoreym
The hardware temporarily stores the acquired data in the onboard Data
FIFO buffer, then transfers the data to the user-defined DMA buffer in the
host PC’s memory. Bus-mastering DMA utilizes the fastest available
transfer rate of PCI-bus. Once the analog acquisition operation starts,
control returns to your program.
The DMA transfer mode is very complex to program. We recommend
using a high-level program library to configure this card. If users would like
to program the software that can handle DMA data transfer, please refer to
http://www.plxtech.com for more information on PCI controllers.
DMA with Scatter Gathering Capability
In multi-user or multi-tasking OS such as Microsoft Windows, Linux, etc., it
would be difficult to allocate a large continuous memory block due to
memory fragmentation. PLX PCI controller provides scatter /gather or
chaining mode to link non-continuous memory blocks into a linked list, so
that users can transfer large amounts of data without being limited by the
fragment of memory blocks. Users can configure the linked list for the input
DMA channel and the output DMA channel, individually.
Figure 4.1.5 shows the linked list that is constructed by three DMA de-
scriptors. Each descriptor contains a PCI address, a local address, a
transfer size, and the pointer to the next descriptor. Users can thus collect
fragmented memory blocks and chain their associative DMA descriptors
altogether. DAQ/PXI-2500 SERIES software driver provides users easy
ways to setup scatter/gather functions. Sample programs are also sup-
plied in the all-in-one CD.
Figure 4.1.5 Scatter/Gather DMA for data transfer
In non-chaining mode, the maximum DMA data transfer size would be 2M
double words (8M bytes). By using chaining mode, scatter/gather, there is
no limitation on DMA data transfer size. Users can also link the descriptor
nodes circularly to achieve a multi-buffered DMA.