ADLINK aTCA-6155 - Manual (Page 29)

Functional Description 15
aTCA-6155
Chipset
Intel® 5520/ICH10R Chipset Overview
The Intel® 5520 Chipset I/O Hub (IOH) provides a connection
point between various I/O components and Intel® QuickPath Inter-
connect (Intel® QPI) based processors. The Intel® 5520 Chipset
is combined with Intel® Xeon® Processor 5500 in their respective
two socket platforms. The Intel® Xeon® 5500 Platform consists of
the Intel Xeon Processor 5500 Series, the Intel 5520 Chipset I/O
Hub (IOH), the I/O Controller Hub (Intel® ICH10), and the I/O sub-
system. The processor includes an integrated Memory Controller
(IMC) that resides within the processor package. This platform is
the first single processing platform that introduces the Intel Quick-
Path Interconnect. Intel QuickPath Interconnect is Intel’s next gen-
eration point-to-point system interconnect interface and replaces
the Front Side Bus.
The IOH provides the interface between the processor Intel Quick-
Path Interconnect and industry-standard PCI Express compo-
nents. The two Intel QuickPath Interconnect interfaces are
full-width links (20 lanes in each direction). The two x16 PCI
Express Gen2 ports are also configurable as x8 and x4 links com-
pliant to the PCI Express Base Specification, Revision 2.0. The
single x4 PCI Express Gen2 port can bifurcate into two indepen-
dent x2 interfaces.In addition, the legacy IOH supports a x4 ESI
link interface for the legacy bridge. The IOH supports the following
features and technologies:
X Intel® QuickPath Interconnect profile
X Interface to CPU or other IOH (limited configurations) PCI
Express Gen2
X Intel® I/O Accelerated Technology (Intel® I/OAT) and Intel®
Quick Data Technology (updated DMA engine with virtual-
ization enhancements)
X Integrated Intel® Management Engine (Intel® ME)
NOTE: NOTE:
The term IOH refers to the Intel 5520 Chipset I/O Hub (IOH)
and ICH10R refers to the Intel® 82801JIR ICH10R I/O
Controller Hub 10 components.