Adjacent cache line prefetch, Execute-disable bit capability, Intel® ht technology – ADLINK aTCA-6155 User Manual

Page 84: Intel® speedstep™ technology, Intel® c-state technology

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BIOS Setup

Adjacent Cache Line Prefetch

This is used to choose the optimal use of sequential memory
access for performance purpose. Disable this setting for appli-
cations that require high use of random memory access.

Execute-Disable Bit Capability

Intel’s Execute Disable Bit is an hardware-based security fea-
ture that can help reduce system exposure to viruses and mali-
cious code. It allows the processor to classify areas in memory
where application code can or cannot execute. When a mali-
cious worm attempts to insert code in the buffer, the processor
disables code execution, preventing damage and worm propa-
gation. To use Execute Disable bit you must have a PC or
server with a processor with Execute Disable Bit capability and
a supporting operating system.

Intel® HT Technology

Hyper-Threading Technology is used to improve parallelization
of computations performed on PC microprocessors. A proces-
sor with hyper-threading enabled is treated by the operating
system as two processors instead of one.

Intel® Speedstep™ Technology

Intel® SpeedStep technology allows the system to dynami-
cally adjust processor voltage and core frequency, which can
result in decreased average power consumption and
decreased average heat production.

Intel® C-State Technology

This function controls the availability of the CPU C-state power
saving technology.

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